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K.-N. Chiang
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Proceedings Papers

Parametric Design and Reliability Analysis of WIT Wafer Level Packaging

Y. T. Lin, P. J. Tang, K. N. Chiang
Proc. ASME. IMECE2000, Packaging of Electronic and Photonic Devices, 69-78, November 5–10, 2000
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2000-2248
https://doi.org/10.1115/IMECE2000-2248
View Paper titled, Parametric Design and Reliability Analysis of WIT Wafer Level Packaging
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Topics: Event history analysis, Packaging, Parametric design, Semiconductor wafers, Density, Reliability, Solders, Copper, Electronic packages, Finite element methods
Proceedings Papers

A Full-Scale 3D Finite Element Analysis for No-Underfill Flip Chip Package

S. M. Hsu, J. C. Lin, K. N. Chiang
Proc. ASME. IMECE2002, Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology, 311-318, November 17–22, 2002
Publisher: American Society of Mechanical Engineers
Paper No: IMECE2002-39674
https://doi.org/10.1115/IMECE2002-39674
View Paper titled, A Full-Scale 3D Finite Element Analysis for No-Underfill Flip Chip Package
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Topics: Finite element analysis, Flip-chip, Flip-chip devices, Flip-chip packages, Reliability, Finite element model, Design, Computation, Ball-Grid-Array packages, Ceramics
Journal Articles

Parametric Design and Reliability Analysis of Wire Interconnect Technology Wafer Level Packaging

Y. T. Lin, Graduate Assistant, C. T. Peng, Graduate Assistant, K. N. Chiang, Associate Professor
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Papers On Reliability
J. Electron. Packag. September 2002, 124(3): 234–239.
https://doi.org/10.1115/1.1481368
Published Online: July 26, 2002
View Article titled, Parametric Design and Reliability Analysis of Wire Interconnect Technology Wafer Level Packaging
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Topics: Copper, Event history analysis, Finite element methods, Flip-chip, Packaging, Reliability, Semiconductor wafers, Solders, Wire, Finite element analysis
Journal Articles

Process Modeling and Thermal/Mechanical Behavior of ACA/ACF Type Flip-Chip Packages

K. N. Chiang, Associate Professor, C. W. Chang, Graduate Student, C. T. Lin, Graduate Student
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Special Section On Therminic
J. Electron. Packag. December 2001, 123(4): 331–337.
https://doi.org/10.1115/1.1389847
Published Online: May 10, 2001
View Article titled, Process Modeling and Thermal/Mechanical Behavior of ACA/ACF Type Flip-Chip Packages
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Topics: Adhesives, Finite element analysis, Flip-chip devices, Manufacturing, Modeling, Particulate matter, Pressure, Springs, Mechanical behavior, Flip-chip packages
Journal Articles

An Effective Approach for Three-Dimensional Finite Element Analysis of Ball Grid Array Typed Packages

H. C. Cheng, K. N. Chiang, M. H. Lee
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Special Section Technical Papers
J. Electron. Packag. June 1998, 120(2): 129–134.
https://doi.org/10.1115/1.2792597
Published Online: June 1, 1998
View Article titled, An Effective Approach for Three-Dimensional Finite Element Analysis of Ball Grid Array Typed Packages
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Topics: Ball-Grid-Array packaging, Finite element analysis, Optimization, Packaging, Solder joints
Journal Articles

Electronic Packaging Reflow Shape Prediction for the Solder Mask Defined Ball Grid Array

K.-N. Chiang, W.-L. Chen
Journal: Journal of Electronic Packaging
Publisher: ASME
Article Type: Special Section Technical Papers
J. Electron. Packag. June 1998, 120(2): 175–178.
https://doi.org/10.1115/1.2792616
Published Online: June 1, 1998
View Article titled, Electronic Packaging Reflow Shape Prediction for the Solder Mask Defined Ball Grid Array
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Topics: Ball-Grid-Array packaging, Electronic packaging, Shapes, Solder masks, Solder joints, Density, Energy conservation, Failure, Fatigue, Gravity (Force)